This is the home of Kactus2, the powerful tool for embedded system design, and it's new companion Wolf for easy description of workflows.
The tools and more are brought to you by
Tampere University of Technology.
Kactus2 makes system, software and hardware teams speak the same language
Intuitive system specification helps communication with SW and HW designers as well as customers and subcontractors. Kactus2 helps to explain managers and sales department the product architecture and contribute to requirements.
All have the freedom to propose new blocks and try out different architectures, while all data is formalized and manual copying of data eliminated. Time and effort is saved and quality improved.
Kactus2 fits to your product design flow. There's no need to change specification, synthesis, verification or other critical tools. You can start gradually using the unifying metadata and Kactus2 as the user interface to it. Productivity is improved as re-use becomes real.
You don't lock-in with Kactus2, because you own data and can freely access it at any time. Kactus2 is based on IEEE1685/IP-XACT metadata with our free and open extensions. Kactus2 comes with a core for managing components and designs plus plugins for automation. Our ambition is the best usability among EDA/ESL tools.
Small and mid-size vendor and integrator companies that now have only the traditional toolset: office tools (doc, xls, ppt) for specification/documentation and Verilog/VHDL, C/C++, FPGA tools for designs. Kactus2 helps taking a step to metadata based design that keeps products much better manageable while still using also the familiar tools.
Universities and research laboratories that implement new content (IP bocks, SW modules). Kactus2 helps packetizing the content in a standard way for (re)using it much easier by others, specifically when the original contributor leave after e.g. a PhD project.
Bigger companies and tool providers that already have modern design tool flows and resources for developing higher abstraction methods. Kactus2 offers a great R&D environment for trying new methodology ideas and user interface innovations. Kactus2 leads the way among metadata-based tools.
What you can do with Kactus2
Draft & Specify from scratch
Quickly draft block diagram blueprints for product boards (PCB), chips, system-on-chip, IPs and get them stored in IP-XACT format
Draft communication channel abstraction endpoint design for all processors and fixed IPs in a product
For new IP-blocks generate code templates (VHDL entities, headers) from IP-XACT components defined in Kactus2
Packetize IP for reuse and exchange
Create "electronic datasheets" of your existing IPs for library as templates and blocks ready for integration
Import, export and integrity check IP libraries from any standard compatible IP vendor
Analyze file dependencies between IP's source files and easily see changes in any file
Create MP-SoC products
Create HW designs with hierarchy across PCB, Chip, SoC, IP-blocks
Define memory areas and registers for the components
Configure base addresses
Create system designs that map SW to HW
Create SW architecture with communication abstraction as channels (MCAPI, Socket and others)
Configure all designs
Generate everything ready for HDL synthesis and SW build for all processors
What you can't do with Kactus2
Create IP functionality. You should use HDL editors and SW IDEs. Kactus2 can create stub code for interfaces. For HW components you may use e.g. TCE-tools to create "C to VHDL" so you can create the copmponent source without knowing much of HDLs.
Generate binaries/executables. You should use HDL synthesis and SW compilation tools, but there is clear path from Kactus2 to other tools. IP-XACT generators are the standard way to build automation between tools.
Press money. But you save a lot of time and effort.
What is Metadata?
Kactus2 follows the general platform based design paradigm with extensive use of metadata. Product is created by assembling application components on platforms, and all are packetized to a library with metadata. Metadata makes sure unambiguous interoperability between partners and tools and makes design automation possible.
Metadata for a component is formal, vendor and technology independent description of the component. It includes references to source files and other related information. Components are in practice HW blocks and SW codes in different abstraction and granularity levels.
Metadata for a design is a formal structural description. It includes references to component metadata, tools, configurations and other design related information.
First, components are encapsulated and separated from their source, e.g. HDL source code is embedded via links to the source file in the metadata file. IP metadata is used to assemble compopnents in a design. IPs as well as the design itself may have generic parameters, which are configured using generators that are typically scripts. The final configured design can be seen as "instructions" on how to create the final executables.
Metadata-based design flow makes selling, buying, integrating and reusing IPs and complete designs much less error prone
Saves time and effort when managing several configurations and variants of the products
Machine readable documentation also for the tools, languages and environments for backup and maintenance
Increased design automation and standard compatibility
Kactus2 extensions to IP-XACT
We handle also SW components as IP-XACT objects. This allows building dependencies and reusing SW easier. IP-XACT parameters and vendor extensions are utilized.
We add attributes to help managing the design process from re-usable components and designs to fixed product releases. IP-XACT parameters and vendor extensions are utilized.
Embedded system products consists of HW and SW design data and plenty of process and other auxiliary information. We consider the product as a hierarchy of its physical realization. Environments refer to the context in which products are specified, verified, tested and finally used. Each product level include associated information like documentation, source codes, tools, configurations and production data.
Our product hierarchy model consists of boards containing chips that are fixed-function or they can accommodate a system-on-chip (SoC), which are built up from IP-blocks. All levels include both HW and SW related information.
The scope of IEEE1685/IP-XACT is on the IP and SoC levels, but we apply the standard also to other levels, aiming at product level information management (PDM, product data management).
Wolf stands for Workflow for Kactus2 and it helps describing the design flows. The novel innovation is its user interface and the way of showing the workflow as expanding graph. Wolf shows at one view the tasks, transitions between them, resources, tools and data dependency.
The first public release of Wolf is there around January 2014
Some examples can be found on opencores.org in the Funbase-library. Fresh examples will be published here.
Lauri Matilainen, Lasse Lehtonen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen, System-on-Chip deployment with MCAPI abstraction and IP-XACT metadata, International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI), Samos, Greece, July 2012, 8 pages
Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen, "Applying IP-XACT for product data management", International Symposium on System-on-Chip, Tampere, Finland, Oct 31 - Nov 2, 2011, pp. 86-91.
Antti Kamppi, Lauri Matilainen, Joni-Matti Määttä, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen, "Kactus2: Environment for Embedded Product Development Using IP-XACT and MCAPI", The 14th Euromicro Conference on Digital System Design (DSD), Oulu, Finland, Aug 31 - Sep 2, 2011, pp. 262-265.
Lauri Matilainen, Erno Salminen, Timo D. Hämäläinen, Marko Hännikäinen, "Multicore Communications API (MCAPI) implementation on an FPGA multiprocessor", International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI), Samos, Greece, July 18-21, 2011, pp. 286 - 293.
A use case how to create IP-XACT HW-Design and generate from it C header, Altera Quartus project and Top VHDL
Add new IP-block to existing design
Set base addresses in HW design
Generate top-level VHDL
Generate Quartus II project
Generate C header files
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TUT makes no representations or warranties as to the accuracy or completeness of any materials and information incorporated thereto and contained on this website. TUT makes no representations or warranties that access to this website will be uninterrupted or error-free, that this website (the materials and/or any information incorporated thereto) will be secure and free of virus or other harmful components.
We welcome any feedback from the tools and suggestions to new features. Further directions are:
Today we focus on improving the productivity of SoC and embedded system design. The means are language and tool agnostic metadata to support re-use and optimization of the design workflow. New ideas are brought into life in our tools that have superior usability as the first requirement.
We work on close collaboration with companies to get requirements for the research and feedback on our solutions. Please contact us if you are interested in a joint project.
Current members are
Prof. Timo D. Hämäläinen,
Dr. Jarno Vanne,
Dr. Erno Salminen,
Lauri Matilainen, Esko Pekkarinen, Mikko Honkonen, Sakari Lahti, Timo Korpela. Alumni are Dr. Kimmo Kuusilinna, Dr. Pasi Kolinummi, Dr. Tero Kangas, Dr. Panu Hämäläinen, Dr. Vesa Lahtinen, Dr. Ari Kulmala, Dr. Tero Arpinen, Dr. Petri Kukkala, Dr. Marko Hännikäinen, Joni-Matti Määttä, Antti Kamppi, Juha Arvio, Juuso Järvinen, Jussi Nieminen, Tapio Koskinen, Mikko Setälä, Kalle Holma, Timo Alho, Antti Rasmus, Janne Muhonen, Pasi Liimatainen, Ville-Veikko Jokinen, Marjo Kari, Pasi Pulkkinen, Kimmo Tikkanen, Eero Ryytty, Antti Jore, Aki Launiainen, Timo Kaikumaa, Juha Särkijärvi, Miia Viitanen, Kaisa Haapala, Tomi Sokeila.